The RV{32,64,128}{F,D,Q} extensions are great on their own, but I propose a set of new extensions to coexist with the current ones.

These new extensions will implement the optional floating point operations suggested by the IEEE 754:2008 standard, aka ISO/IEC/IEEE 60559:2011, based on whether a specific core includes the F, D, or Q extensions:

  • e^x
  • 2^x
  • 10^x
  • (e^x)-1
  • (2^x)-1
  • (10^x)-1
  • \ln x
  • \log_2 x
  • \log_{10} x
  • \ln(1+x)
  • \log_2(1+x)
  • \log_{10}(1+x)
  • \sqrt{x^2+y^2}
  • (1+x)^n
  • x^{1\over n}
  • x^n
  • x^y
  • \sin x
  • \cos x
  • \tan x
  • \arcsin x
  • \arccos x
  • \arctan x
  • \arctan2(y,x)
  • \sin\Pi x
  • \cos\Pi x
  • {\arctan x\over\pi}
  • {\arctan2(y,x)\over\pi}
  • \sinh x
  • \cosh x
  • \tanh x
  • \arcsinh x
  • \arccosh x
  • \arctanh x

The aim is to eliminate software emulation of these floating point operations by providing a fixed set of opcodes.

Here’s a draft written in LaTeX.

Proposal for completing the IEEE~754 functionality in RISC-V.

Proposed instruction format and mnemonics by Trond Endrest{\o}l (\href{mailto:Trond.Endrestol@ximalas.info}{\texttt{Trond.Endrestol@ximalas.info}).
The RISC-V Foundation is to determine the letter(s) assigned to this extension/these extensions.

The aim is to provide a fixed set of opcodes for these floating point operations and possibly eliminate software emulation of said operations.
The total number of instructions require two opcode prefixes to make it easier to distinguish between instructions needing one or two source operands.

These are the operations this extension/these extensions will provide.

\begin{itemize}
\item\(e^x\)
\item\(2^x\)
\item\(10^x\)
\item\((e^x)-1\)
\item\((2^x)-1\)
\item\((10^x)-1\)
\item\(\ln x\)
\item\(\log_2 x\)
\item\(\log_{10} x\)
\item\(\ln(1+x)\)
\item\(\log_2(1+x)\)
\item\(\log_{10}(1+x)\)
\item\(\sqrt{x^2+y^2}\)
\item\((1+x)^n\)
\item\(x^{1\over n}\)
\item\(x^n\)
\item\(x^y\)
\item\(\sin x\)
\item\(\cos x\)
\item\(\tan x\)
\item\(\arcsin x\)
\item\(\arccos x\)
\item\(\arctan x\)
\item\(\arctan2(y,x)\)
\item\(\sin\Pi x\)
\item\(\cos\Pi x\)
\item\({\arctan x\over\pi}\)
\item\({\arctan2(y,x)\over\pi}\)
\item\(\sinh x\)
\item\(\cosh x\)
\item\(\tanh x\)
\item\(\arcsinh x\)
\item\(\arccosh x\)
\item\(\arctanh x\)
\end{itemize}

See \texttt{\url{https://en.wikipedia.org/wiki/IEEE_754#Recommended_operations}}
for further description.

\begin{center}
\begin{tabular}{R@{}F@{}R@{}R@{}F@{}R@{}O}
\\
\instbitrange{31}{27} &
\instbitrange{26}{25} &
\instbitrange{24}{20} &
\instbitrange{19}{15} &
\instbitrange{14}{12} &
\instbitrange{11}{7} &
\instbitrange{6}{0} \\
\hline
\multicolumn{1}{|c|}{funct5} &
\multicolumn{1}{c|}{fmt} &
\multicolumn{1}{c|}{rs2} &
\multicolumn{1}{c|}{rs1} &
\multicolumn{1}{c|}{rm} &
\multicolumn{1}{c|}{rd} &
\multicolumn{1}{c|}{opcode} \\
\hline
5 & 2 & 5 & 5 & 3 & 5 & 7 \\
FEPOWX    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
F2POWX    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
F10POWX   & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FEPOWXM1  & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
F2POWXM1  & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
F10POWXM1 & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FLN       & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FLOG2     & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FLOG10    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FLN1PX    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FLOG21PX  & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FLOG101PX & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FSIN      & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FCOS      & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FTAN      & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FASIN     & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FACOS     & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FATAN     & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FSINPI    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FCOSPI    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FATANPI   & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FSINH     & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FCOSH     & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FTANH     & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FASINH    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FACOSH    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FATANH    & S/D/Q & N/A  & X & RM & dest & OP-FPX1 \\
FHYPOT    & S/D/Q & Y    & X & RM & dest & OP-FPX2 \\
F1PXPOWN  & S/D/Q & N    & X & RM & dest & OP-FPX2 \\
FXPOWINVN & S/D/Q & N    & X & RM & dest & OP-FPX2 \\
FXPOWN    & S/D/Q & N    & X & RM & dest & OP-FPX2 \\
FXPOWY    & S/D/Q & Y    & X & RM & dest & OP-FPX2 \\
FATAN2    & S/D/Q & Y    & X & RM & dest & OP-FPX2 \\
FATAN2PI  & S/D/Q & Y    & X & RM & dest & OP-FPX2 \\
\end{tabular}
\end{center}

Proposed encoding of funct5 and opcode.

\begin{center}
\begin{tabular}
FEPOWX    & 00000 & OP-FPX1 \\
F2POWX    & 00001 & OP-FPX1 \\
F10POWX   & 00010 & OP-FPX1 \\
FEPOWXM1  & 00011 & OP-FPX1 \\
F2POWXM1  & 00100 & OP-FPX1 \\
F10POWXM1 & 00101 & OP-FPX1 \\
FLN       & 00110 & OP-FPX1 \\
FLOG2     & 00111 & OP-FPX1 \\
FLOG10    & 01000 & OP-FPX1 \\
FLN1PX    & 01001 & OP-FPX1 \\
FLOG21PX  & 01010 & OP-FPX1 \\
FLOG101PX & 01011 & OP-FPX1 \\
FSIN      & 01100 & OP-FPX1 \\
FCOS      & 01101 & OP-FPX1 \\
FTAN      & 01110 & OP-FPX1 \\
FASIN     & 01111 & OP-FPX1 \\
FACOS     & 10000 & OP-FPX1 \\
FATAN     & 10001 & OP-FPX1 \\
FSINPI    & 10010 & OP-FPX1 \\
FCOSPI    & 10011 & OP-FPX1 \\
FATANPI   & 10100 & OP-FPX1 \\
FSINH     & 10101 & OP-FPX1 \\
FCOSH     & 10110 & OP-FPX1 \\
FTANH     & 10111 & OP-FPX1 \\
FASINH    & 11000 & OP-FPX1 \\
FACOSH    & 11001 & OP-FPX1 \\
FATANH    & 11010 & OP-FPX1 \\
FHYPOT    & 00000 & OP-FPX2 \\
F1PXPOWN  & 00001 & OP-FPX2 \\
FXPOWINVN & 00010 & OP-FPX2 \\
FXPOWN    & 00011 & OP-FPX2 \\
FXPOWY    & 00100 & OP-FPX2 \\
FATAN2    & 00101 & OP-FPX2 \\
FATAN2PI  & 00110 & OP-FPX2 \\
\end{tabular}
\end{center}

OP-FPX1 and OP-FPX2 to be named and assigned their values by the RISC-V Foundation.

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